Cadence Design Systems, Inc. - Common Stock (CDNS)

Cadence (Nasdaq: CDNS) today announced results for the first quarter of 2026.

Cadence (Nasdaq: CDNS) today announced an expansion of its longstanding relationship with TSMC to accelerate AI-driven semiconductor innovation. The expanded collaboration will deliver IP, signoff-ready, end-to-end design infrastructure, and advanced, certified flows for leading-edge AI silicon on TSMC’s N3, N2, A16™ and A14 process technologies. The companies’ enhanced work will help customers reduce iterations and improve correlation for DTCO-focused advanced AI and HPC designs—accelerating time to silicon with greater confidence. Customer momentum underscores the impact of this collaboration, with many early and mainstream companies actively designing on TSMC’s 3nm or 2nm technologies.​

At CadenceLIVE Silicon Valley 2026, Cadence (Nasdaq: CDNS) announced an expanded partnership with NVIDIA to deliver accelerated solutions across agentic AI, physics-based simulation and digital twins to unlock new levels of productivity and accelerate next‑generation engineering design flows across semiconductor design, physical AI systems and hyperscale AI factories.

Cadence, an industry leader in AI-driven computational software for semiconductor and system design, today announced a strategic collaboration with Google to optimize the Cadence® ChipStack™ AI Super Agent with Gemini on Google Cloud. This collaboration positions Cadence at the forefront of the shift toward agentic design automation, creating an agent-driven, scalable, cloud-native platform for next-generation chip design and verification.

Cadence (Nasdaq: CDNS) will hold its first quarter 2026 financial results webcast on Monday, April 27, 2026.

Today, Cadence announced an expansion of its broad collaboration with NVIDIA to accelerate Cadence’s Design for AI and AI for Design strategy. The next generation of agentic AI design solutions includes autonomous, long-running agents that require accelerated, trusted, physics-grounded engines to translate design intent into automated flows, generate designs and debug errors, and manage long, complex, end-to-end workflows. Cadence’s leadership in agentic AI is expanded by integrating its portfolio of industry-leading chip and system design solutions with NVIDIA’s accelerated computing stack.

Cadence Design Systems, Inc. (Nasdaq: CDNS):

Cadence (Nasdaq: CDNS) today announced that it has completed its previously announced acquisition of Hexagon AB’s Design and Engineering (“D&E”) business, significantly expanding its System Design and Analysis (SDA) portfolio and strategically positioning the company to capitalize on the Physical AI opportunity.

Cadence (Nasdaq: CDNS) today announced results for the fourth quarter and fiscal year 2025.

Cadence (Nasdaq: CDNS) today announced a transformative step forward in redefining how semiconductors are designed with the launch of the ChipStack™ AI Super Agent—an agentic AI solution for front-end silicon design and verification. The Cadence® ChipStack AI Super Agent is the world’s first agentic workflow for automating chip design and verification. It provides up to 10X productivity improvements for coding designs and testbenches, creating test plans, orchestrating regression testing, debugging and automatically fixing issues.

Cadence (Nasdaq: CDNS) today announced the Cadence® Tensilica® HiFi iQ DSP IP, the sixth generation of its highly successful HiFi DSP family, based on a new architecture purpose-built for next-generation voice AI and emerging immersive audio. As these applications proliferate in the home entertainment, automotive infotainment and smartphone markets, the HiFi iQ DSP delivers the performance and energy efficiency required to meet growing SoC computational demands. Compared to the industry-leading Tensilica HiFi 5s DSP, the HiFi iQ DSP offers 2X greater compute performance, 8X higher AI performance and more than 25% energy savings for most workloads—delivering over 40% performance uplift on numerous audio codecs.

Cadence (Nasdaq: CDNS) today announced the industry’s first LPDDR5X 9600Mbps memory IP system solution designed specifically for enterprise and data center applications with high reliability. This innovative solution integrates Cadence’s production-proven LPDDR5X IP and Microsoft’s advanced redundant array of independent double data rate (RAIDDR) error correction code (ECC) coding schema, delivering a powerful combination of high performance, low power consumption and robust reliability. Microsoft is the first customer to deploy the new system solution.

Cadence (Nasdaq: CDNS) will hold its fourth quarter and fiscal year 2025 financial results webcast on Tuesday, February 17, 2026.

Cadence (Nasdaq: CDNS) today announced a Chiplet Spec-to-Packaged Parts ecosystem to reduce engineering complexity and accelerate time to market for customers developing chiplets targeting physical AI, data center, and high-performance computing (HPC) applications. Initial IP partners joining Cadence include Arm, Arteris, eMemory, M31 Technology, Silicon Creations and Trilinear Technologies, as well as silicon analytics partner proteanTecs. To help reduce risk and streamline customer adoption, Cadence is collaborating with Samsung Foundry to build out a silicon prototype demonstration of the Cadence® Physical AI chiplet platform, including pre-integrated partner IP on the Samsung Foundry SF5A process.

Cadence (Nasdaq: CDNS):

Cadence (Nasdaq: CDNS):

Cadence (Nasdaq: CDNS) today announced the appointment of Dr. Luc Van den hove to its board of directors, effective January 1, 2026. Dr. Van den hove currently serves as chief executive officer of imec, a world-leading non-for-profit research and innovation hub in nanoelectronics and digital technologies.

Cadence (Nasdaq: CDNS):

Cadence (Nasdaq: CDNS) today announced it has completed the previously announced acquisition of Secure-IC, a leading provider of embedded security IP, security solutions and security evaluation tools and services.

Cadence (Nasdaq: CDNS) today announced results for the third quarter of 2025.

The Cadence Giving Foundation today announced a multi-year commitment to expand the AI Hub at San José State University (SJSU) to equip students with the skills, hands-on training and experience needed to excel in careers in artificial intelligence (AI).

Cadence (Nasdaq: CDNS) will hold its third quarter 2025 financial results webcast on Monday, October 27, 2025.

OpenEye miniCUP--Cadence Molecular Sciences (OpenEye), a business unit of Cadence (Nasdaq: CDNS), announced today at miniCUP Boston, the launch of ROCS X, an AI-enabled virtual-- screening solution that allows scientists to conduct 3D searches of trillions of drug-like molecules. The ROCS X technology was developed and validated through collaboration with Treeline Biosciences, a biotechnology firm focused on addressing serious medical conditions such as cancer. Utilizing ROCS X, Treeline has physically sourced over 150 novel compounds for evaluation as potential drug candidates.

Cadence (Nasdaq: CDNS) today announced major advancements in chip design automation and IP, driven by its long-standing relationship with TSMC to develop advanced design infrastructure and accelerate time to market, for AI and HPC customer applications. Cadence and TSMC have collaborated closely across the spectrum from AI-driven EDA to 3D-ICs to IP and photonics, enabling the world’s most advanced semiconductors.

Cadence today announced a significant expansion of its Cadence® Reality™ Digital Twin Platform library with a digital twin of NVIDIA DGX SuperPOD with DGX GB200 systems. The new model of NVIDIA’s high-performance accelerated computing platform will enable data center designers and operators to easily deploy the world’s leading AI accelerator in the buildout of AI factories. Cadence’s Reality Digital Twin Platform is the first and only solution that allows users to model AI factories and data centers with high accuracy to a specified service-level agreement—accurately accounting for constraints such as cost, space, energy, cooling and environmental impact—all before physical implementation.